FPGA学习板的流水灯Quartus源码 -

module LED(
input rst_n,
input sw1,
input sw2,
input sw3,
input sw4,
input sw5,
output led0,
output led1,
output led2,
output led3,
output led4,
output led5,
output led6,
output led7,
input clk,
output reg [7:0] dat,
output reg rs,
output rw,
output en
);
reg e;
reg [15:0] counter;
reg [5:0] current,next,next_f;
reg clkr;
reg [1:0] cnt_f,cnt_g;
reg [26:0] cnt;
reg [7:0] led;
reg [3:0] spd;
reg [1:0] knd;
reg drc;
reg [1:0] stt;
reg [4:0] flg;
reg [4:0] flg_f;
reg [5:0] stt_f;
reg [2:0] i;
always @(posedge clk or negedge rst_n) begin
if(!rst_n) begin
cnt <= 27'd0;
stt <= 2'd0;
next_f <= 6'h0;
cnt_g <= 2'h0;
end
else begin
i <= sw2 * 2'd3;
spd <= (sw1 + 1'b1) * (i + 1'b1);
knd[0] <= sw3;
knd[1] <= sw4;
drc <= sw5;
cnt <= cnt + 1'b1;
if(cnt == 27'h400000 * spd) begin
cnt <= 27'd0;
stt <= stt + 1'b1 - drc * 2'd2;
case(knd * 4 + stt)
4'h0:led <= 8'h11;
4'h1:led <= 8'h22;
4'h2:led <= 8'h44;
4'h3:led <= 8'h88;
4'h4:led <= 8'h33;
4'h5:led <= 8'hCC;
4'h6:led <= 8'h33;
4'h7:led <= 8'hCC;
4'h8:led <= 8'h77;
4'h9:led <= 8'hEE;
4'hA:led <= 8'hDD;
4'hB:led <= 8'hBB;
4'hC:led <= 8'hF;
4'hD:led <= 8'hF0;
4'hE:led <= 8'hF;
4'hF:led <= 8'hF0;
endcase
end
end
end
always @(posedge clk)
begin
counter=counter+1;
if(counter==16'h000f)
clkr=~clkr;
end
always @(posedge clkr)
begin
current=next;
case(current)
6'h0: begin rs<=0; dat<=8'h38; next<=6'h1; end //清屏
6'h1: begin rs<=0; dat<=8'h0c; next<=6'h2; end //设置显示模式
6'h2: begin rs<=0; dat<=8'h6; next<=6'h3; end //显示器开、光标不显示、光标不允许闪烁
6'h3: begin rs<=0; dat<=8'h1; next<=6'h4; end
6'h4: begin rs<=1; dat<=" "; next<=6'h5; end
6'h5: begin rs<=1; dat<="S"; next<=6'h6; end
6'h6: begin rs<=1; dat<="p"; next<=6'h7; end
6'h7: begin rs<=1; dat<="e"; next<=6'h8; end
6'h8: begin rs<=1; dat<="e"; next<=6'h9; end
6'h9: begin rs<=1; dat<="d"; next<=6'hA; end
6'hA: begin rs<=1; dat<=":"; next<=6'hB; end
6'hB: begin rs<=1; dat<= 8'h30 + spd; next<=6'hC; end
6'hC: begin rs<=1; dat<=" "; next<=6'hD; end
6'hD: begin rs<=1; dat<="K"; next<=6'hE; end
6'hE: begin rs<=1; dat<="i"; next<=6'hF; end
6'hF: begin rs<=1; dat<="n"; next<=6'h10; end
6'h10: begin rs<=1; dat<="d"; next<=6'h11; end
6'h11: begin rs<=1; dat<=":"; next<=6'h12; end
6'h12: begin rs<=1; dat<= 8'h31 + knd; next<=6'h13; end
6'h13: begin rs<=1; dat<=" "; next<=6'h14; end
6'h14: begin rs<=0; dat<=8'hC0; next<=6'h15; end
6'h15: begin rs<=1; dat<=" "; next<=6'h16; end
6'h16: begin rs<=1; dat<=" "; next<=6'h17; end
6'h17: begin rs<=1; dat<="D"; next<=6'h18; end
6'h18: begin rs<=1; dat<="i"; next<=6'h19; end
6'h19: begin rs<=1; dat<="r"; next<=6'h1A; end
6'h1A: begin rs<=1; dat<="e"; next<=6'h1B; end
6'h1B: begin rs<=1; dat<="c"; next<=6'h1C; end
6'h1C: begin rs<=1; dat<="t"; next<=6'h1D; end
6'h1D: begin rs<=1; dat<="i"; next<=6'h1E; end
6'h1E: begin rs<=1; dat<="o"; next<=6'h1F; end
6'h1F: begin rs<=1; dat<="n"; next<=6'h20; end
6'h20: begin rs<=1; dat<=":"; next<=6'h21; end
6'h21: begin rs<=1; dat<= 8'h30 + drc; next<=6'h22; end
6'h22: begin rs<=1; dat<=" "; next<=6'h23; end
6'h23: begin rs<=1; dat<=" "; next<=6'h24; end
6'h24: begin rs<=1; dat<=" "; next<=6'h25; end
6'h25: begin rs<=0; dat<=8'h00; //行一遍然后把液晶的E 脚拉高
if(cnt_f!=2'h2)
begin
e<=0;next<=6'h0;cnt_f<=cnt_f+1;
end
else
begin next<=6'h25; e<=1; next <= next_f; cnt_f <= cnt_g;
end
end
default: next=6'h0;
endcase
end
assign en=clkr|e;
assign rw=0;
assign led0 = led[0];
assign led1 = led[1];
assign led2 = led[2];
assign led3 = led[3];
assign led4 = led[4];
assign led5 = led[5];
assign led6 = led[6];
assign led7 = led[7];
endmodule

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