[Hole To Hole Clearance Constraint Violation] diyike.PcbDoc Advanced PCB Hole To Hole Clearance Constraint: (Collision < 0.254mm) Between Via (135.509mm,86.487mm) Top Layer to Bottom Layer And Pad LED1-1(135.509mm,86.487mm) Multi-Layer Pad/Via Touching Holes 20:34:36 2016/2/22 1