IAR FOR 8051之Z-STACK -函数存储地址定位(f8w2430.xcl自定义区域块)

ID:71477 · 发表于 2015-1-1 18:52

////////////////////////////////////////////////////////////////////////////////
//
// File: f8w2430.xcl
//
// Description:
// This is an extended command line file for XLINK tool to be used when
// developing/debugging applications written for the Chipcon CC2430.
// This file was originally created by concatenation of default files
// provided by IAR: lnk51ew_cc2430.xcl and lnk_base.xcl.
//
// Important:
// Data cannot be located at address zero, this address is reserved for
// the null pointer.
//
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
// Variables (used by lnk_base.xcl)
// ================================
//
// Segment limits
// --------------
//
//
// IDATA
//
-D_IDATA_END=0xFF // Last address of Idata memory
//
//
// PDATA
//
-D_PDATA_START=0xEF00 // First address for PDATA memory.
-D_PDATA_END=0xEFFF // Last address for PDATA memory.
//
//
// IXDATA
//
// These settings are used for devices that don't use PM2/PM3
-D_IXDATA_START=E000 // The internal IXDATA block is 8K,
-D_IXDATA_END=FEFF // End of IXDATA if PM2/PM3 are not used
//
// These settings must be used for devices that use PM2/PM3.
// Note that the IXDATA_START allows the XSTACK to grow down into the non-persistent RAM, but
// checks in HAL Sleep insure that the stack is back into persistent RAM before entering PM2/PM3.
//-D_IXDATA_START=EE00 // The internal IXDATA block is 4K+,
//-D_IXDATA_END=FD55 // FD56-FEFF is used for saving the CC2430 registers before sleep.
//
// FF00-FFFF is mapped to IDATA.
//
//
// XDATA
//
-D_XDATA_START=_IXDATA_START // The IXDATA is used as XDATA.
-D_XDATA_END=_IXDATA_END
//
//
// NEAR CODE
//
-D_NEAR_CODE_END=0x7FFF // Last address for near code, near code segment is 32KB in banked code model.
//
//
// TINY CODE
//
-D_TINY_CODE_END=0x7FF // Last address for tiny code.
//
//
// CODE
//
// These settings determine the size/location of the ROOT segment.
// Increase _CODE_END to increase ROOT memory, i.e. for constants.
-D_CODE_START=0x0000 // Code size = 128k for CC2430-F128
//-D_CODE_END=0x28FF // Last address for ROOT bank 原来的默认配置
-D_CODE_END=0x27FF // Last address for ROOT bank 自定义的配置
//
//-D_BANK1A=(10000+_CODE_END+1) // First address for BANK1 原来的默认配置
//
///////////////自定义的BANK0分区//////////////////////////////////////////////////
///////////////自定义的BANK0分区//////////////////////////////////////////////////
//把BANK0区域自定义为3块注意：0X0000-0X27FF前面这些有关于中断等的地址，不要乱动。
-D_BLCODE1_START=0x2800 // 自定义的8K
-D_BLCODE1_END=0x47FF
//可以在函数定义前用#pragma location="BLCODE1" 把该函数的存储地址定位到BLCODE1区域中。多个函数可以//多次使用，地址默认连续存储 BLCODE1在下面定义
-D_BLCODE2_START=0x4800 //自定义的8K
-D_BLCODE2_END=0x67FF
//
-D_BLCODE3_START=0x6800 //自定义的6K
-D_BLCODE3_END=0x7FFF //BANK0 的32K从0X0000-0X07FFF 这里把BANK0分区3块
//
-D_BANK1A=(10000+_BLCODE3_END+1) // First address for BANK1 0x18000 这个10000是16进制的，注意
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
// ZigBee Stack Non-Volatile Storage
//默认的配置，不要动
-D_ZIGNV_START=0x3E000 // The two pages before the last two pages of the 3rd overlayed bank.
-D_ZIGNV_SIZE=0x1000 // Size of ZigBee NV (2 pages)
-D_ZIGNV_END=(_ZIGNV_START+_ZIGNV_SIZE-1)
//
//
// HEX FILE GENERATION
//
// Include the following line when generating hex file:
//-M(CODE)_BANK1A-1FFFF,28000-2FFFF,38000-3DFFF,3F000-3fff7=(_CODE_END+1)-0xFFFF,0x10000-0x17FFF,0x18000-0x1DFFF,0x1F000-0x1FFF7
//
//
// Special SFRs
// ------------
//
//
// Register bank setup
//默认的配置，不要动
-D?REGISTER_BANK=0 // Default register bank (0,1,2,3).
-D_REGISTER_BANK_START=0 // Start address for default register bank (00,08,10,18).
-D_FIRST_BANK_ADDR=0x10000
-D_NR_OF_BANKS=0x03
//
//
// PDATA bank setup
//
-D?PBANK_NUMBER=EF // High byte of 16-bit address to the PDATA area
-D?PBANK=93 // Most significant byte in MOVX A,@R0. (0x93 is sfr MPAGE)
//
//
// Virtual register setup
// ----------------------
//
-D_BREG_START=0x00 // The bit address where the BREG segments starts.
// Must be placed on: _BREG_START%8=0 where _BREG_START <= 0x78.
-D?VB=0x20 // ?VB is used when referencing BREG as whole byte.
// Must be placed on: ?VB=0x20+_BREG_START/8
//
//
//
// To the reader: Ignore this section ------------------------------------------
//默认的配置，不要动
// Dummy definitions needed to satisfy lnk_base.xcl
-D_FAR_DATA_NR_OF_BANKS=0x0E // Number of banks in far data memory.
-D_FAR_DATA_START=0x010001 // First address of far memory.
-D_FAR_DATA_END=0xFFFFFF // Last address of far memory.
-D_FAR_CODE_START=_CODE_START // First address for far code.
-D_FAR_CODE_END=_CODE_END // Last address for far code.
// End of the section to ignore ------------------------------------------------
//
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
// File: the following defintions are extracted from the lnkbase.xcl file
//
////////////////////////////////////////////////////////////////////////////////
//
//
// IDATA memory
//默认的配置，不要动
// Setup "bit" segments (only for '__no_init bool' variables).
-Z(BIT)BREG=_BREG_START
-Z(BIT)BIT_N=0-7F
//
-Z(DATA)REGISTERS+8=_REGISTER_BANK_START
-Z(DATA)BDATA_Z,BDATA_N,BDATA_I=20-2F
-Z(DATA)VREG+_NR_OF_VIRTUAL_REGISTERS=08-7F
-Z(DATA)PSP,XSP=08-7F
-Z(DATA)DOVERLAY=08-7F
-Z(DATA)DATA_I,DATA_Z,DATA_N=08-7F
//
-U(IDATA)0-7F=(DATA)0-7F
-Z(IDATA)IDATA_I,IDATA_Z,IDATA_N=08-_IDATA_END
-Z(IDATA)ISTACK+_IDATA_STACK_SIZE#08-_IDATA_END
-Z(IDATA)IOVERLAY=08-FF
//
//
// ROM memory
//
// Note: INTVEC must be placed first.
// Note: CSTART Must be located in first 64k.
//
// Program memory
//默认的配置，不要动
-Z(CODE)INTVEC=0
-Z(CODE)CSTART=_CODE_START-_CODE_END
-Z(CODE)RCODE=_CODE_START-_CODE_END
-Z(CODE)TINY_CODE=_CODE_START-_TINY_CODE_END
-Z(CODE)NEAR_CODE=_CODE_START-_NEAR_CODE_END
-Z(CODE)DIFUNCT=_CODE_START-_CODE_END
-Z(CODE)FAR_CODE=_CODE_START-_CODE_END
-Z(CODE)BANK_RELAYS=_CODE_START-_CODE_END
//
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//可以在函数定义前用#pragma location="BLCODE1" 把该函数的存储地址定位到BLCODE1区域中。多个函数可以//多次使用，地址默认连续存储
-Z(CODE)BLCODE1=_BLCODE1_START-_BLCODE1_END //自定义的BANK0中的块8K
-Z(CODE)BLCODE2=_BLCODE2_START-_BLCODE2_END //自定义的BANK0中的块8K
-Z(CODE)BLCODE3=_BLCODE3_START-_BLCODE3_END //自定义的BANK0中的块6K
//
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//默认的配置，不用管
-P(CODE)BANKED_CODE=_BANK1_START-_BANK1_END,_BANK2_START-_BANK2_END,_BANK3_START-_BANK3_END,_BANK3b_START-_BANK3b_END
//
//
// Initializers
//默认的配置，不用管
-Z(CODE)BIT_ID,BDATA_ID,DATA_ID,IDATA_ID,IXDATA_ID,PDATA_ID,XDATA_ID=_CODE_START-_CODE_END
-Z(CODE)HUGE_ID=_FAR_CODE_START-_FAR_CODE_END
//
//
// Constants located in code memory
//默认的配置，不用管
-Z(CODE)CODE_C=_CODE_START-_CODE_END
-Z(CODE)FAR_CODE_C=_FAR_CODE_START-_FAR_CODE_END
-Z(CODE)HUGE_CODE_C=_FAR_CODE_START-_FAR_CODE_END
-Z(CODE)CHECKSUM#_CODE_END
//
//
// Stacks located in XDATA
//默认的配置，不用管
-Z(XDATA)EXT_STACK+_EXTENDED_STACK_SIZE=_EXTENDED_STACK_START-_EXTENDED_STACK_END
-Z(XDATA)PSTACK+_PDATA_STACK_SIZE=_PDATA_START-_PDATA_END
-Z(XDATA)XSTACK+_XDATA_STACK_SIZE=_XDATA_START-_XDATA_END
//
//
// PDATA - data memory
//默认的配置，不用管
-Z(XDATA)PDATA_N,PDATA_Z,PDATA_I=_PDATA_START-_PDATA_END
//
//
// XDATA - data memory
//默认的配置，不用管
-Z(XDATA)IXDATA_N,IXDATA_Z,IXDATA_I=_IXDATA_START-_IXDATA_END
-Z(XDATA)XDATA_N,XDATA_Z,XDATA_I=_XDATA_START-_XDATA_END
-Z(XDATA)XDATA_HEAP+_XDATA_HEAP_SIZE=_XDATA_START-_XDATA_END
-Z(CONST)XDATA_ROM_C=_XDATA_START-_XDATA_END
//
//
// FAR - extended data memory
//默认的配置，不用管
// Initialized FAR data
// Note: The segment FAR_I and FAR_ID must start at the same address within a 64k bank,
// they must therefore be located first in the FAR data area, and in the xlink linker file
// Note: *_I segment is located in RAM but *_ID segments is located in ROM
-Z(SPLIT-XDATA)FAR_Z=[_FAR_DATA_START-_FAR_DATA_END]/10000
-Z(SPLIT-XDATA)FAR_I=[_FAR_DATA_START-_FAR_DATA_END]/10000
-Z(SPLIT-CODE)FAR_ID=[_FAR_CODE_START-_FAR_CODE_END]/10000
-Z(SPLIT-XDATA)FAR_HEAP+_FAR_HEAP_SIZE=[_FAR_DATA_START-_FAR_DATA_END]/10000
-P(XDATA)FAR_N=[_FAR_DATA_START-_FAR_DATA_END]*_FAR_DATA_NR_OF_BANKS+10000
-P(CONST)FAR_ROM_C=[_FAR_DATA_START-_FAR_DATA_END]*E+10000
//
//
// HUGE - extended data memory
//默认的配置，不用管
-Z(XDATA)HUGE_N,HUGE_Z,HUGE_I=_FAR_DATA_START-_FAR_DATA_END
-Z(XDATA)HUGE_HEAP+_HUGE_HEAP_SIZE=_FAR_DATA_START-_FAR_DATA_END
-Z(CONST)HUGE_ROM_C=_FAR_DATA_START-_FAR_DATA_END
//
//
-cx51
//
//
// CC2430 Device Specific
// ======================
//
// Overlayed Code Bank Addresses
//逻辑地址定义，便于识别,逻辑地址并不连续，对应的物理地址就是连续的，从0-1FFFF是BANK0-BANK3
-D_BANK1_START=_BANK1A // 1st overlayed code bank
-D_BANK1_END=0x1FFFF //这是逻辑地址，并不是实际地址，这样写便于识别1代码BANK1
//
-D_BANK2_START=0x28000 // 2nd overlayed code bank
-D_BANK2_END=0x2FFFF //这是逻辑地址，并不是实际地址，这样写便于识别2代码BANK2
//
-D_BANK3_START=0x38000 // 3rd overlayed code bank
-D_BANK3_END=0x3DFFF //这是逻辑地址，并不是实际地址，这样写便于识别3代码BANK3
//
-D_BANK3b_START=(_ZIGNV_END+1) // 3rd overlayed code bank after the pages dedicated to NV.
-D_BANK3b_END=0x3FFF7 // Last 8 bytes of last Flash page reserved for IEEE address.
//
-P(CODE)BANK1=_BANK1_START-_BANK1_END
-P(CODE)BANK2=_BANK2_START-_BANK2_END
-P(CODE)BANK3=_BANK3_START-_BANK3_END
-P(CODE)ZIGNV=_ZIGNV_START-_ZIGNV_END
-P(CODE)BANK3b=_BANK3b_START-_BANK3b_END
//
// IEEE Address Space
//默认的配置，不用管
-D_IEEE_ADDR_START=0x3FFF8 // Last 8 bytes of flash
-D_IEEE_ADDR_END=0x3FFFF
//
////////////////////////////////////////////////////////////////////////////////

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