愧为新手，公司有个以前做的项目，拿到前人留下的程序，想学习学习。刚上来就被时钟搞混了。
这块板子用的是STM32L151，外接3.6864MHz晶振，OSC32IN和OSC32out没接晶振。这块板子需要精确延时的。
按我理解，时钟应该是3.6864*8/2=14.7456M,但是我看代码里还是基于8M来设置的。
RCC_GetClocksFreq(&RCC_Clocks); //获取系统时钟频率,外部晶振8.00M,倍频后系统时钟8.000*8/2=32.00M
注释是说外部晶振8M，可实际上没有接8M，只接的是3.6864MHz晶振。
对应的RCC_GetClocksFreq如下：
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks)
{
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, presc = 0, msirange = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> 13;
RCC_Clocks->SYSCLK_Frequency = (((1 << msirange) * 64000) - (MSITable[msirange] * 24000));
break;
case 0x04: /* HSI used as system clock */
RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;
break;
case 0x08: /* HSE used as system clock */
RCC_Clocks->SYSCLK_Frequency = HSE_VALUE;
break;
case 0x0C: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
pllmul = PLLMulTable[(pllmul >> 18)];
plldiv = (plldiv >> 22) + 1;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
if (pllsource == 0x00)
{
/* HSI oscillator clock selected as PLL clock entry */
RCC_Clocks->SYSCLK_Frequency = (((HSI_VALUE) * pllmul) / plldiv);
}
else
{
/* HSE selected as PLL clock entry */
RCC_Clocks->SYSCLK_Frequency = (((HSE_VALUE) * pllmul) / plldiv);
}
break;
default:
RCC_Clocks->SYSCLK_Frequency = HSI_VALUE;
break;
}
在system_stm32lxx.c里，看到倍频分频设置值跟外接8M一样，几乎没改动。
/* PLL configuration: PLLCLK = (HSE * 8) / 2 = 32MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |
RCC_CFGR_PLLDIV));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL8 | RCC_CFGR_PLLDIV2);
我揣测是利用的内部的HSI 8M来计算的，我在相关代码里没找到使用HSI的语句，郁闷啊。也没有发现用此晶振3.6864MHz晶振代替系统默认的8M。 哪位恳请帮理一下。新手琢磨了几天了，对RCC还是有点糊涂。
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