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F28335的svpwm的实现:已经调试,晶振是20MHz

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ID:876414 发表于 2021-1-12 09:39 | 显示全部楼层 |阅读模式
F28335的svpwm的实现:已经调试,晶振是20MHz
  1. // TI File $Revision: /main/8 $
  2. // Checkin $Date: August 10, 2007   09:04:53 $
  3. //###########################################################################
  4. //
  5. // FILE:    Example_2833xEPwm3UpAQ.c
  6. //
  7. // TITLE:   Action Qualifier Module Upcount mode.
  8. //
  9. // ASSUMPTIONS:
  10. //
  11. //     This program requires the DSP2833x header files.
  12. //
  13. //     Monitor the ePWM1 - ePWM3 pins on a oscilloscope as
  14. //     described below.
  15. //
  16. //        EPWM1A is on GPIO0
  17. //        EPWM1B is on GPIO1
  18. //
  19. //        EPWM2A is on GPIO2
  20. //        EPWM2B is on GPIO3
  21. //
  22. //        EPWM3A is on GPIO4
  23. //        EPWM3B is on GPIO5
  24. //
  25. //     As supplied, this project is configured for "boot to SARAM"
  26. //     operation.  The 2833x Boot Mode table is shown below.
  27. //     For information on configuring the boot mode of an eZdsp,
  28. //     please refer to the documentation included with the eZdsp,
  29. //
  30. //       $Boot_Table:
  31. //
  32. //         GPIO87   GPIO86     GPIO85   GPIO84
  33. //          XA15     XA14       XA13     XA12
  34. //           PU       PU         PU       PU
  35. //        ==========================================
  36. //            1        1          1        1    Jump to Flash
  37. //            1        1          1        0    SCI-A boot
  38. //            1        1          0        1    SPI-A boot
  39. //            1        1          0        0    I2C-A boot
  40. //            1        0          1        1    eCAN-A boot
  41. //            1        0          1        0    McBSP-A boot
  42. //            1        0          0        1    Jump to XINTF x16
  43. //            1        0          0        0    Jump to XINTF x32
  44. //            0        1          1        1    Jump to OTP
  45. //            0        1          1        0    Parallel GPIO I/O boot
  46. //            0        1          0        1    Parallel XINTF boot
  47. //            0        1          0        0    Jump to SARAM            <- "boot to SARAM"
  48. //            0        0          1        1    Branch to check boot mode
  49. //            0        0          1        0    Boot to flash, bypass ADC cal
  50. //            0        0          0        1    Boot to SARAM, bypass ADC cal
  51. //            0        0          0        0    Boot to SCI-A, bypass ADC cal
  52. //                                              Boot_Table_End$
  53. //
  54. // DESCRIPTION:
  55. //
  56. //    This example configures ePWM1, ePWM2, ePWM3 to produce an
  57. //    waveform with independant modulation on EPWMxA and
  58. //    EPWMxB.
  59. //
  60. //    The compare values CMPA and CMPB are modified within the ePWM's ISR
  61. //
  62. //    The TB counter is in upmode for this example.
  63. //
  64. //    View the EPWM1A/B, EPWM2A/B and EPWM3A/B waveforms
  65. //    via an oscilloscope
  66. //
  67. //
  68. //###########################################################################
  69. // $TI Release: DSP2833x Header Files V1.01 $
  70. // $Release Date: September 26, 2007 $
  71. //###########################################################################


  72. #include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
  73. #include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
  74. #include "math.h"
  75. #include "IQmathLib.h"

  76. typedef struct
  77. {
  78.    float ds;
  79.    float qs;
  80.    float ang;
  81.    float de;
  82.    float qe;
  83. }IPARK;
  84.   IPARK ipark1={0,0,0,0.3,0.4};
  85.   IPARK *v=&ipark1;

  86. // Prototype statements for functions found within this file.
  87. void InitEPwm1Example(void);
  88. void InitEPwm2Example(void);
  89. void InitEPwm3Example(void);
  90. interrupt void epwm1_isr(void);
  91. void ipark(IPARK *v);
  92. void svgen(IPARK *v);
  93. // Configure the period for each timer
  94. #define PRD  7500  // Period register
  95. #define PI 3.1415926
  96. float tmr1,tmr2,tmr3;

  97. void main(void)
  98. {
  99. // Step 1. Initialize System Control:
  100. // PLL, WatchDog, enable Peripheral Clocks
  101. // This example function is found in the DSP2833x_SysCtrl.c file.
  102.    InitSysCtrl();

  103. // Step 2. Initalize GPIO:
  104. // This example function is found in the DSP2833x_Gpio.c file and
  105. // illustrates how to set the GPIO to it's default state.
  106. // InitGpio();  // Skipped for this example

  107. // For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
  108. // These functions are in the DSP2833x_EPwm.c file
  109.    InitEPwm1Gpio();
  110.    InitEPwm2Gpio();
  111.    InitEPwm3Gpio();


  112. // Step 3. Clear all interrupts and initialize PIE vector table:
  113. // Disable CPU interrupts
  114.    DINT;

  115. // Initialize the PIE control registers to their default state.
  116. // The default state is all PIE interrupts disabled and flags
  117. // are cleared.
  118. // This function is found in the DSP2833x_PieCtrl.c file.
  119.    InitPieCtrl();

  120. // Disable CPU interrupts and clear all CPU interrupt flags:
  121.    IER = 0x0000;
  122.    IFR = 0x0000;

  123. // Initialize the PIE vector table with pointers to the shell Interrupt
  124. // Service Routines (ISR).
  125. // This will populate the entire table, even if the interrupt
  126. // is not used in this example.  This is useful for debug purposes.
  127. // The shell ISR routines are found in DSP2833x_DefaultIsr.c.
  128. // This function is found in DSP2833x_PieVect.c.
  129.    InitPieVectTable();

  130. // Interrupts that are used in this example are re-mapped to
  131. // ISR functions found within this file.
  132.    EALLOW;  // This is needed to write to EALLOW protected registers
  133.    PieVectTable.EPWM1_INT = &epwm1_isr;
  134.   
  135.    EDIS;    // This is needed to disable write to EALLOW protected registers

  136. // Step 4. Initialize all the Device Peripherals:
  137. // This function is found in DSP2833x_InitPeripherals.c
  138. // InitPeripherals();  // Not required for this example

  139. // For this example, only initialize the ePWM

  140.    EALLOW;
  141.    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
  142.    EDIS;

  143.    InitEPwm1Example();
  144.    InitEPwm2Example();
  145.    InitEPwm3Example();

  146.    EALLOW;
  147.    SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
  148.    EDIS;


  149. // Step 5. User specific code, enable interrupts:

  150. // Enable CPU INT3 which is connected to EPWM1-3 INT:
  151.    IER |= M_INT3;

  152. // Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
  153.    PieCtrlRegs.PIEIER3.bit.INTx1 = 1;


  154. // Enable global Interrupts and higher priority real-time debug events:
  155.    EINT;   // Enable Global interrupt INTM
  156.    ERTM;   // Enable Global realtime interrupt DBGM

  157. // Step 6. IDLE loop. Just sit and loop forever (optional):
  158.    for(;;)
  159.    {
  160.        asm("          NOP");
  161.    }

  162. }

  163. interrupt void epwm1_isr(void)
  164. {
  165.    // Update the CMPA and CMPB values
  166.    svgen(v);
  167.    EPwm1Regs.CMPA.half.CMPA=tmr1;
  168.    EPwm2Regs.CMPA.half.CMPA=tmr2;
  169.    EPwm3Regs.CMPA.half.CMPA=tmr3;
  170.    EPwm1Regs.CMPB=tmr1;
  171.    EPwm2Regs.CMPB=tmr2;
  172.    EPwm3Regs.CMPB=tmr3;
  173.    
  174.    // Clear INT flag for this timer
  175.    EPwm1Regs.ETCLR.bit.INT = 1;

  176.    // Acknowledge this interrupt to receive more interrupts from group 3
  177.    PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
  178. }


  179. void ipark(IPARK *v)
  180. {
  181.   
  182.   float  ang;


  183.   ang=(v->ang/360)*2*PI;
  184.   v->ds=v->de*cos(ang)-v->qe*sin(ang);
  185.   v->qs=v->qe*cos(ang)+v->de*sin(ang);
  186. }

  187. void svgen(IPARK *v)
  188. {
  189.    _iq Va,Vb,Vc,t1,t2,Ta,Tb,Tc;
  190.    Uint32 sector=0;
  191.    ipark(v);
  192.    Va=v->qs;
  193.    Vb=_IQmpy(_IQ(-0.5),v->qs)+_IQmpy(_IQ(0.8660254),v->ds);
  194.    Vc=_IQmpy(_IQ(-0.5),v->qs)-_IQmpy(_IQ(0.8660254),v->ds);
  195.    if(Va>_IQ(0))
  196.    sector=1;
  197.    if(Vb>_IQ(0))
  198.    sector=sector+2;
  199.    if(Vc>_IQ(0))
  200.    sector=sector+4;
  201.    
  202.    Va=v->qs;
  203.    Vb=_IQmpy(_IQ(0.5),v->qs)+_IQmpy(_IQ(0.8660254),v->ds);
  204.    Vc=_IQmpy(_IQ(0.5),v->qs)-_IQmpy(_IQ(0.8660254),v->ds);
  205.    if(sector==0)
  206.    {
  207.        tmr1=_IQ(0.5);
  208.        tmr2=_IQ(0.5);
  209.        tmr3=_IQ(0.5);
  210.    }
  211.    if(sector==1)
  212.    {
  213.        t1=Vc;
  214.        t2=Vb;
  215.        Tb=_IQmpy(_IQ(0.25),(_IQ(1)-t1-t2));
  216.        Ta=Tb+_IQmpy(_IQ(0.5),t1);
  217.        Tc=Ta+_IQmpy(_IQ(0.5),t2);
  218.    }
  219.    if(sector==2)
  220.    {
  221.        t1=Vb;
  222.        t2=-Va;
  223.        Ta=_IQmpy(_IQ(0.25),(_IQ(1)-t1-t2));
  224.        Tc=Ta+_IQmpy(_IQ(0.5),t1);
  225.        Tb=Tc+_IQmpy(_IQ(0.5),t2);
  226.    }
  227.    if(sector==3)
  228.    {
  229.        t1=-Vc;
  230.        t2=Va;
  231.        Ta=_IQmpy(_IQ(0.25),(_IQ(1)-t1-t2));
  232.        Tb=Ta+_IQmpy(_IQ(0.5),t1);
  233.        Tc=Tb+_IQmpy(_IQ(0.5),t2);
  234.    }
  235.    if(sector==4)
  236.    {
  237.        t1=-Va;
  238.        t2=Vc;
  239.        Tc=_IQmpy(_IQ(0.25),(_IQ(1)-t1-t2));
  240.        Tb=Tc+_IQmpy(_IQ(0.5),t1);
  241.        Ta=Tb+_IQmpy(_IQ(0.5),t2);
  242.    }
  243.    if(sector==5)
  244.    {
  245.        t1=Va;
  246.        t2=-Vb;
  247.        Tb=_IQmpy(_IQ(0.25),(_IQ(1)-t1-t2));
  248.        Tc=Tb+_IQmpy(_IQ(0.5),t1);
  249.        Ta=Tc+_IQmpy(_IQ(0.5),t2);
  250.    }
  251.    if(sector==6)
  252.    {
  253.        t1=-Vb;
  254.        t2=-Vc;
  255.        Tc=_IQmpy(_IQ(0.25),(_IQ(1)-t1-t2));
  256.        Ta=Tc+_IQmpy(_IQ(0.5),t1);
  257.        Tb=Ta+_IQmpy(_IQ(0.5),t2);
  258.    }
  259.    tmr1=Ta;
  260.    tmr2=Tb;
  261.    tmr3=Tc;
  262. }
  263. void InitEPwm1Example()
  264. {

  265.    // Setup TBCLK
  266.    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
  267.    EPwm1Regs.TBPRD = PRD;       // Set timer period
  268.    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
  269.    EPwm1Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
  270.    EPwm1Regs.TBCTR = 0x0000;                  // Clear counter
  271.    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;   // Clock ratio to SYSCLKOUT
  272.    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV2;

  273.    // Setup shadow register load on ZERO
  274.    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
  275.    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
  276.    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
  277.    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

  278.    // Set Compare values
  279.    EPwm1Regs.CMPA.half.CMPA = 1875;    // Set compare A value
  280.    EPwm1Regs.CMPB = 1875;              // Set Compare B value

  281.    // Set actions
  282.    EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;            // Set PWM1A on Zero
  283.    EPwm1Regs.AQCTLA.bit.CAU = AQ_TOGGLE;          // Clear PWM1A on event A, up count

  284.    EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;            // Set PWM1B on Zero
  285.    EPwm1Regs.AQCTLB.bit.CBU = AQ_TOGGLE;          // Clear PWM1B on event B, up count

  286.    // Interrupt where we will change the Compare Values
  287.    EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
  288.    EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT
  289.    EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 3rd event



  290. }


  291. void InitEPwm2Example()
  292. {
  293.    // Setup TBCLK
  294.    EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
  295.    EPwm2Regs.TBPRD = PRD;       // Set timer period
  296.    EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
  297.    EPwm2Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
  298.    EPwm2Regs.TBCTR = 0x0000;                  // Clear counter
  299.    EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;   // Clock ratio to SYSCLKOUT
  300.    EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV2;

  301.    // Setup shadow register load on ZERO
  302.    EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
  303.    EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
  304.    EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
  305.    EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

  306.    // Set Compare values
  307.    EPwm2Regs.CMPA.half.CMPA =1875;       // Set compare A value
  308.    EPwm2Regs.CMPB = 1875;                 // Set Compare B value

  309.    // Set actions
  310.    EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;            // Set PWM1A on Zero
  311.    EPwm2Regs.AQCTLA.bit.CAU = AQ_TOGGLE;          // Clear PWM1A on event A, up count

  312.    EPwm2Regs.AQCTLB.bit.ZRO = AQ_SET;            // Set PWM1B on Zero
  313.    EPwm2Regs.AQCTLB.bit.CBU = AQ_TOGGLE;          // Clear PWM1B on event B, up count


  314.    // Interrupt where we will change the Compare Values
  315.    //EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;        // Select INT on Zero event
  316.    EPwm2Regs.ETSEL.bit.INTEN = 0;                   // Enable INT
  317.    //EPwm2Regs.ETPS.bit.INTPRD = ET_1ST;              // Generate INT on 3rd event

  318.   
  319. }


  320. void InitEPwm3Example(void)
  321. {


  322.    // Setup TBCLK
  323.    EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
  324.    EPwm3Regs.TBPRD = PRD;       // Set timer period
  325.    EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
  326.    EPwm3Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
  327.    EPwm3Regs.TBCTR = 0x0000;                  // Clear counter
  328.    EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;   // Clock ratio to SYSCLKOUT
  329.    EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;

  330.    // Setup shadow register load on ZERO
  331.    EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
  332.    EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
  333.    EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
  334.    EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

  335.   // Set Compare values
  336.    EPwm3Regs.CMPA.half.CMPA = 1875; // Set compare A value
  337.    EPwm3Regs.CMPB = 1875;           // Set Compare B value

  338.    // Set Actions
  339.    EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;            // Set PWM1A on Zero
  340.    EPwm3Regs.AQCTLA.bit.CAU = AQ_TOGGLE;          // Clear PWM1A on event A, up count

  341.    EPwm3Regs.AQCTLB.bit.ZRO = AQ_SET;            // Set PWM1B on Zero
  342.    EPwm3Regs.AQCTLB.bit.CBU = AQ_TOGGLE;          // Clear PWM1B on event B, up count

  343.    // Interrupt where we will change the Compare Values
  344.    //EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
  345.    EPwm3Regs.ETSEL.bit.INTEN = 0;                // Enable INT
  346.    //EPwm3Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 3rd event

  347.    
  348. }





  349. //===========================================================================
  350. // No more.
  351. //===========================================================================
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ID:575853 发表于 2021-4-23 15:54 | 显示全部楼层
为什么输出的是方波,占空比不变化
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ID:883629 发表于 2021-2-17 17:09 | 显示全部楼层
这是三相的还是单相的?
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